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DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
ITC
1996
IEEE
13 years 9 months ago
1996
IEEE
Abstract. In complex systems, embedded processors may be used to run software routines for test pattern generation and response evaluation. For system components which are not comp...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
ICCAD
1994
IEEE
13 years 9 months ago
1994
IEEE
Existing built-in self test (BIST) strategies require the use of specialized test pattern generation hardware which introduces signi cant area overhead and performance degradation...