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BNCOD
2003
104views Database» more  BNCOD 2003»
13 years 6 months ago
External Sorting with On-the-Fly Compression
Evaluating a query can involve manipulation of large volumes of temporary data. When the volume of data becomes too great, activities such as joins and sorting must use disk, and ...
John Yiannis, Justin Zobel
DATE
2008
IEEE
106views Hardware» more  DATE 2008»
13 years 11 months ago
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
Anshuman Chandra, Felix Ng, Rohit Kapur
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
13 years 11 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
DATE
2005
IEEE
125views Hardware» more  DATE 2005»
13 years 10 months ago
Hybrid BIST Based on Repeating Sequences and Cluster Analysis
We present a hybrid BIST approach that extracts the most frequently occurring sequences from deterministic test patterns; these extracted sequences are stored on-chip. We use clus...
Lei Li, Krishnendu Chakrabarty
VTS
2003
IEEE
119views Hardware» more  VTS 2003»
13 years 10 months ago
Test Data Compression Using Dictionaries with Fixed-Length Indices
—We present a dictionary-based test data compression approach for reducing test data volume and testing time in SOCs. The proposed method is based on the use of a small number of...
Lei Li, Krishnendu Chakrabarty