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» Retargeting of Compiled Simulators for Digital Signal Proces...
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DAC
1996
ACM
10 years 3 months ago
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra...
CASES
2007
ACM
10 years 3 months ago
Compiler generation from structural architecture descriptions
With increasing complexity of modern embedded systems, the availability of highly optimizing compilers becomes more and more important. At the same time, application specific inst...
Florian Brandner, Dietmar Ebner, Andreas Krall
DAC
1997
ACM
10 years 3 months ago
Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign
An experimental set of tools that generate instruction set simulators, assemblers, and disassemblers from a single description was developed to test if retargetable development to...
Mark R. Hartoog, James A. Rowson, Prakash D. Reddy...
MTV
2005
IEEE
100views Hardware» more  MTV 2005»
10 years 5 months ago
A Study of Architecture Description Languages from a Model-based Perspective
Abstract— Owing to the recent trend of using applicationspecific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specif...
Wei Qin, Sharad Malik
ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
10 years 3 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
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