14 search results - page 2 / 3 » Robust testability of primitive faults using test points |
VTS
2007
IEEE
14 years 15 days ago
2007
IEEE
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
ISSTA
2004
ACM
13 years 11 months ago
2004
ACM
This paper presents a new compile-time analysis that enables a testing methodology for white-box coverage testing of error recovery code (i.e., exception handlers) in Java web ser...
IOLTS
2000
IEEE
13 years 10 months ago
2000
IEEE
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
SP
2007
IEEE
14 years 15 days ago
2007
IEEE
We present a new technique that enables software recovery in legacy applications by retrofitting exception-handling capabilities, error virtualization using rescue points. We int...
DAC
1995
ACM
13 years 9 months ago
1995
ACM
Retiming has been proposed as an optimizationstep forsequential circuits represented at the net-list level. Retiming moves the latches across the logic gates and in doing so chang...