175 search results - page 5 / 35 » SOC Testing Methodology and Practice |
DAC
1999
ACM
13 years 10 months ago
1999
ACM
The purpose of this paper is to develop a exible design for test methodology for testing a core-based system on chip SOC . The novel feature of the approach is the use an embedde...
ET
2002
13 years 5 months ago
2002
As we approach 100nm technology the interconnect issues are becoming one of the main concerns in the testing of gigahertz system-onchips. Voltage distortion (noise) and delay viol...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but al...
ITC
2003
IEEE
13 years 11 months ago
2003
IEEE
In a carefully structured study spanning several months, the authors visited numerous companies focused on Design For Test methodologies in SoC Test, Characterization, and Failure...
ETS
2006
IEEE
13 years 11 months ago
2006
IEEE
The Networks-on-Chip (NoCs) paradigm is emerging as a solution for the communication of SoCs. Many NoC architecture propositions are presented but few works on testing these netwo...