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CODES
2003
IEEE
13 years 10 months ago
Schedule-aware performance estimation of communication architecture for efficient design space exploration
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
Sungchan Kim, Chaeseok Im, Soonhoi Ha
CODES
2004
IEEE
13 years 8 months ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha
ASPLOS
2006
ACM
13 years 8 months ago
Efficiently exploring architectural design spaces via predictive modeling
Architects use cycle-by-cycle simulation to evaluate design choices and understand tradeoffs and interactions among design parameters. Efficiently exploring exponential-size desig...
Engin Ipek, Sally A. McKee, Rich Caruana, Bronis R...
ASAP
2008
IEEE
110views Hardware» more  ASAP 2008»
13 years 11 months ago
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures
Cooperative MIMO is a new technique that allows disjoint wireless communication nodes (e.g. wireless sensors) to form a virtual antenna array to increase bandwidth, reliability an...
Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T....
CORR
2007
Springer
154views Education» more  CORR 2007»
13 years 5 months ago
Application of a design space exploration tool to enhance interleaver generation
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
Cyrille Chavet, Philippe Coussy, Pascal Urard, Eri...