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SASP
2008
IEEE
164views Hardware» more  SASP 2008»
14 years 13 days ago
AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications
This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The proces...
Tohru Ishihara, Seiichiro Yamaguchi, Yuriko Ishito...
SBCCI
2005
ACM
115views VLSI» more  SBCCI 2005»
13 years 11 months ago
Design of a decompressor engine on a SPARC processor
Code compression, initially conceived as an effective technique to reduce code size in embedded systems, today also brings advantages in terms of performance and energy consumpti...
Richard E. Billo, Rodolfo Azevedo, Guido Araujo, P...
SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
14 years 10 days ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
DAC
2012
ACM
11 years 8 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
CODES
2004
IEEE
13 years 9 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel