8 search results - page 1 / 2 » Signal Sampling Based Transition Modeling for Digital Gates ... |
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
Current characterization methods introduce an important error in the measurement process. In this paper, we present a novel method to drive the timing characterization of logic gat...
EVOW
1999
Springer
13 years 9 months ago
1999
Springer
The traditional paradigm for digital filter design is based on the concept of a linear difference equation with the output response being a weighted sum of signal samples with usua...
ASPDAC
2010
ACM
13 years 2 months ago
2010
ACM
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Current CMOS technologies are characterized by interconnect lines with increased relative resistance w.r.t. driver output resistance. Designs generate signal waveshapes that are v...