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» Silicon CMOS devices beyond scaling
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IBMRD
2006
77views more  IBMRD 2006»
13 years 4 months ago
Silicon CMOS devices beyond scaling
Wilfried Haensch, Edward J. Nowak, Robert H. Denna...
ISQED
2007
IEEE
136views Hardware» more  ISQED 2007»
13 years 11 months ago
Strain Silicon Optimization for Memory and Logic in Nano-Scale CMOS
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...
Rajani Kuchipudi, Hamid Mahmoodi
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
13 years 9 months ago
CMOS system-on-a-chip voltage scaling beyond 50nm
† The limits on CMOS energy dissipation imposed by subthreshold leakage currents and by wiring capacitance are investigated for CMOS generations beyond 50nm at NTRS projected loc...
Azeez J. Bhavnagarwala, Blanca Austin, Ashok Kapoo...
IEICET
2006
79views more  IEICET 2006»
13 years 4 months ago
System LSI: Challenges and Opportunities
End of CMOS scaling has been discussed in many places since the late 90's. Even if the end of CMOS scaling is irrelevant, it is for sure that we are facing a turning point in...
Tadahiro Kuroda
ITC
1996
IEEE
123views Hardware» more  ITC 1996»
13 years 9 months ago
IDDQ Test: Sensitivity Analysis of Scaling
While technology is changing the face of the world, it itself is changing by leaps and bounds; there is a continuing trend to put more functionality on the same piece of silicon. ...
Thomas W. Williams, Robert H. Dennard, Rohit Kapur...