Sciweavers

85 search results - page 16 / 17
» Static Program Partitioning for Embedded Processors
Sort
View
CODES
2004
IEEE
13 years 9 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel
CASES
2006
ACM
13 years 9 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
DAC
2010
ACM
13 years 5 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
CC
2008
Springer
193views System Software» more  CC 2008»
13 years 7 months ago
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model
The polyhedral model provides powerful abstractions to optimize loop nests with regular accesses. Affine transformations in this model capture a complex sequence of execution-reord...
Uday Bondhugula, Muthu Manikandan Baskaran, Sriram...
NOCS
2007
IEEE
13 years 11 months ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...