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» Storage coding for wear leveling in flash memories
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MICRO
2009
IEEE
507views Hardware» more  MICRO 2009»
13 years 11 months ago
Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling
Phase Change Memory (PCM) is an emerging memory technology that can increase main memory capacity in a cost-effective and power-efficient manner. However, PCM cells can endure on...
Moinuddin K. Qureshi, John Karidis, Michele France...
ISCAS
2006
IEEE
140views Hardware» more  ISCAS 2006»
13 years 10 months ago
Multilevel flash memory on-chip error correction based on trellis coded modulation
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivi...
Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Z...
DAC
2009
ACM
14 years 5 months ago
Energy-aware error control coding for Flash memories
The use of Flash memories in portable embedded systems is ever increasing. This is because of the multi-level storage capability that makes them excellent candidates for high dens...
Veera Papirla, Chaitali Chakrabarti
DATE
2009
IEEE
180views Hardware» more  DATE 2009»
13 years 11 months ago
FSAF: File system aware flash translation layer for NAND Flash Memories
NAND Flash Memories require Garbage Collection (GC) and Wear Leveling (WL) operations to be carried out by Flash Translation Layers (FTLs) that oversee flash management. Owing to ...
Sai Krishna Mylavarapu, Siddharth Choudhuri, Avira...
ICCD
2003
IEEE
140views Hardware» more  ICCD 2003»
14 years 1 months ago
Cost-Efficient Memory Architecture Design of NAND Flash Memory Embedded Systems
NAND flash memory has become an indispensable component in embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cos,t and high d...
Chanik Park, Jaeyu Seo, Dongyoung Seo, Shinhan Kim...