90 search results - page 17 / 18 » Suffix tree construction algorithms on modern hardware |
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
In this paper, we address the problem of simultaneous routing and buffer insertion. Recently in [12, 22], the authors considered simultaneous maze routing and buffer insertion und...
ICCAD
2010
IEEE
13 years 3 months ago
2010
IEEE
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
In recent years, the X-Architecture is introduced to obtain better performance for integrated circuit physical design. This paper reformulates the global routing problem in X-Archi...
IEEEPACT
2007
IEEE
13 years 12 months ago
2007
IEEE
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
ASPDAC
2010
ACM
13 years 3 months ago
2010
ACM
Abstract--In nanometer-scale VLSI physical design, clock network becomes a major concern on determining the total performance of digital circuit. Clock skew and PVT (Process, Volta...