56 search results - page 1 / 12 » Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply ... |
DAC
1999
ACM
13 years 9 months ago
1999
ACM
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
ISLPED
1999
ACM
13 years 9 months ago
1999
ACM
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
VLSID
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract—Integrated power supplies are critical building blocks in stateof-the-art portable applications, where they efficiently and accurately transform a battery supply into va...
ARVLSI
2001
IEEE
13 years 8 months ago
2001
IEEE
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
VLSID
2001
IEEE
14 years 5 months ago
2001
IEEE
Development of the process technology for dual threshold (dual Vth ) CMOS circuit has opened up the possibility of using it to reduce static power in low voltage high performance ...