56 search results - page 10 / 12 » Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply ... |
GLVLSI
2007
IEEE
14 years 14 days ago
2007
IEEE
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...
VLSID
2003
IEEE
14 years 6 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
VLSID
2007
IEEE
14 years 6 months ago
2007
IEEE
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
ISPD
2009
ACM
14 years 29 days ago
2009
ACM
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges...
GLVLSI
2003
IEEE
13 years 11 months ago
2003
IEEE
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...