6 search results - page 1 / 2 » Testing Logic Cores using a BIST P1500 Compliant Approach: A... |
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
In this paper we describe how we applied a BIST-based approach to the test of a logic core to be included in System-on-achip (SoC) environments. The approach advantages are the ab...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper we present a microprocessor-based approach suitable for embedded flash memory testing in a System-on-achip (SOC) environment. The main novelty of the approach is the...
ITC
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper discusses practical issues involved in applying logic built-in self-test (BIST) to four large industrial designs. These multi-clock designs, ranging in size from 200K t...
IOLTS
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper proposes a new solution for the diagnosis of faults into embedded RAMs, currently under evaluation within STMicroelectronics. The proposed scheme uses dedicated circuit...
CSREAESA
2009
13 years 5 months ago
2009
Two embedded processor based fault injection case studies are presented which are applicable to Field Programmable Gate Arrays (FPGAs) and FPGA cores in configurable System-on-Chip...