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ISOLA
2004
Springer
13 years 11 months ago
The Identification of registers in RTL Structures for the Test Application
Daniel Mika, Josef Strnadel, Kotásek Zdenik
RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
13 years 11 months ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...
DAC
2005
ACM
14 years 6 months ago
Structural search for RTL with predicate learning
We present an efficient search strategy for satisfiability checking on circuits represented at the register-transfer-level (RTL). We use the RTL circuit structure by extending con...
Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting...
VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
14 years 5 months ago
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
M. S. Gaur, Mark Zwolinski
DSD
2007
IEEE
83views Hardware» more  DSD 2007»
13 years 12 months ago
Hierarchical Identification of Untestable Faults in Sequential Circuits
Similar to sequential test pattern generation, the problem of identifying untestable faults in sequential circuits remains unsolved. Most of the previous works in untestability id...
Jaan Raik, Raimund Ubar, Anna Krivenko, Margus Kru...