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» The Multiprocessor Bandwidth Inheritance Protocol
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NOCS
2008
IEEE
13 years 11 months ago
Reducing the Interconnection Network Cost of Chip Multiprocessors
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
Pablo Abad, Valentin Puente, José-Án...
IPPS
1998
IEEE
13 years 9 months ago
Multiprocessor Architectures Using Multi-Hop Multi-OPS Lightwave Networks and Distributed Control
Advances in optical technology have increased the interest for multiprocessor architectures based on lightwave networks because of the vast bandwidth available. In this paper we p...
David Coudert, Afonso Ferreira, Xavier Muño...
ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
13 years 9 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
SC
1992
ACM
13 years 9 months ago
Willow: A Scalable Shared Memory Multiprocessor
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
John K. Bennett, Sandhya Dwarkadas, Jay A. Greenwo...
IEEEPACT
2005
IEEE
13 years 10 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...