256 search results - page 1 / 52 » Timing Verification by Successive Approximation |
CAV
1992
Springer
13 years 9 months ago
1992
Springer
ATS
2001
IEEE
13 years 9 months ago
2001
IEEE
This paper develops a framework to support trace theoretic verification of timed circuits and systems. A theoretical foundation for classifying timed traces as either successes or...
FM
2008
Springer
13 years 6 months ago
2008
Springer
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
Productivity data for IC designs indicates an exponential increase in design time and cost with the number of elements that are to be included in a device. Present applications re...
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
An error cancellation technique is described for suppressing capacitor mismatch in a successive approximation A/D converter. At the cost of a 50% increase in the conversion time, ...