4164 search results - page 1 / 833 » Timing model reduction for hierarchical timing analysis |
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
— In this paper, we propose a timing model reduction algorithm for hierarchical timing analysis based on a bicliquestar replacement technique. In hierarchical timing analysis, ea...
FORMATS
2007
Springer
13 years 8 months ago
2007
Springer
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been pr...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper proposes a new hierarchical circuit modeling and simulation technique in s-domain for linear analog circuits. The new algorithm can perform circuit complexity reduction...
ICCAD
2007
IEEE
14 years 1 months ago
2007
IEEE
While the increasing need for addressing process variability in sub-90nm VLSI technologies has sparkled a large body of statistical timing and optimization research, the realizati...