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» Timing-based delay test for screening small delay defects
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VTS
2000
IEEE
167views Hardware» more  VTS 2000»
13 years 9 months ago
Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukher...
ET
2010
98views more  ET 2010»
13 years 3 months ago
MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics
Abstract As technology scales down into the nanometer era, delay testing of modern chips has become more and more important. Tests for the path delay fault model are widely used to...
Stephan Eggersglüß, Görschwin Fey,...
TCAD
2008
114views more  TCAD 2008»
13 years 4 months ago
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
Zhanglei Wang, Krishnendu Chakrabarty
ATS
1996
IEEE
93views Hardware» more  ATS 1996»
13 years 9 months ago
Testable Design and Testing of MCMs Based on Multifrequency Scan
In this paper, we present a novel and efticient approach to test MCM at the module as well as chip levels. Our design incorporates the concept of the multifrequency test method an...
Wang-Dauh Tseng, Kuochen Wang