35 search results - page 2 / 7 » Topologically constrained logic synthesis |
ICCAD
1995
IEEE
13 years 8 months ago
1995
IEEE
Abstract—We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematical...
GLVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
Most of the logic synthesis algorithms are not scalable for large networks and, for this reason, partitioning is often applied. However traditional mincut-based partitioning techn...
INFOCOM
2006
IEEE
13 years 11 months ago
2006
IEEE
nts etc.), an abstract graph of the deployment area and QoS constraints to generate appropriate logical topologies. WIND starts with the set of network elements to be deployed (Nod...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications desc...
TCAD
2008
13 years 4 months ago
2008
Abstract--This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. Th...