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EURODAC
1995
IEEE
107views VHDL» more  EURODAC 1995»
13 years 8 months ago
A backplane approach for cosimulation in high-level system specification environments
S. Schmerler, Y. Tanurhan, Klaus D. Müller-Gl...
EURODAC
1995
IEEE
155views VHDL» more  EURODAC 1995»
13 years 8 months ago
Design and use of a system-level specification and verification methodology
M. M. Kamal Hashmi, Alistair C. Bruce
EURODAC
1994
IEEE
110views VHDL» more  EURODAC 1994»
13 years 8 months ago
An experimental analysis of the effectiveness of the circular self-test path technique
Paolo Prinetto, Fulvio Corno, Matteo Sonza Reorda
EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
13 years 9 months ago
A process algebra interpretation of a verification oriented overlanguage of VHDL
The VOVHDL language was defined as a verification oriented VHDL
Catherine Bayol, Bernard Soulas, Dominique Borrion...