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FCCM
2004
IEEE
143views VLSI» more  FCCM 2004»
13 years 8 months ago
Reconfigurable Molecular Dynamics Simulator
Current high-performance applications are typically implemented on large-scale general-purpose distributed or multiprocessing systems often based on commodity microprocessors. Fie...
Navid Azizi, Ian Kuon, Aaron Egier, Ahmad Darabiha...
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
13 years 10 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
13 years 11 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
KES
1998
Springer
13 years 8 months ago
Insect vision based motion detection
The architectural and circuit design aspects of a mixed analog/digital very large scale integration (VLSI) motion detection chip based on models of the insect visual system are des...
X. T. Nguyen
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 5 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood