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» Verification Methodologies in a TLM-to-RTL Design Flow
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DAC
2005
ACM
13 years 7 months ago
A design platform for 90-nm leakage reduction techniques
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on l...
Philippe Royannez, Hugh Mair, Franck Dahan, Mike W...
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
13 years 9 months ago
Customizing IP cores for system-on-chip designs using extensive external don't-cares
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
13 years 7 months ago
Power estimation starategies for a low-power security processor
In this paper, we present the power estimation methodologies for the development of a low-power security processor that contains significant amount of logic and memory. For the lo...
Yen-Fong Lee, Shi-Yu Huang, Sheng-Yu Hsu, I-Ling C...
CADE
2005
Springer
14 years 5 months ago
Privacy-Sensitive Information Flow with JML
In today's society, people have very little control over what kinds of personal data are collected and stored by various agencies in both the private and public sectors. We de...
Guillaume Dufay, Amy P. Felty, Stan Matwin
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 9 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli