584 search results - page 1 / 117 » Verification-Aware Microprocessor Design |
IEEEPACT
2007
IEEE
13 years 11 months ago
2007
IEEE
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
VLSID
2010
IEEE
13 years 3 months ago
2010
IEEE
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, is one of the promising solutions to mitigate the interconnect...
DFT
2008
IEEE
13 years 7 months ago
2008
IEEE
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
DAC
1998
ACM
13 years 9 months ago
1998
ACM
We present a methodology for the design and analysis of power grids in the PowerPC™ microprocessors. The methodology covers the need for power grid analysis across all stages of...