29 search results - page 3 / 6 » WAVSTAN: waveform based variational static timing analysis |
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
—As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing analysis to statistical static timing analysis for hig...
TVLSI
2008
13 years 5 months ago
2008
With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Max...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
Existing static timing analyzers make several assumptions about circuits, implicitly trading off accuracy for speed. In this paper we examine the validity of these assumptions, no...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...