14 search results - page 1 / 3 » WTA: waveform-based timing analysis for deep submicron circu... |
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
Existing static timing analyzers make several assumptions about circuits, implicitly trading off accuracy for speed. In this paper we examine the validity of these assumptions, no...
DAC
1997
ACM
13 years 9 months ago
1997
ACM
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
Capacitance coupling can have a significant impact on gate delay in today's deep submicron circuits. In this paper we present a static timing analysis tool that calculates th...
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
TCAD
2002
13 years 4 months ago
2002
We develop a general methodology to analyze crosstalk effects that are likely to cause errors in deep submicron high speed circuits. We focus on crosstalk due to capacitive coupli...