17 search results - page 2 / 4 » What is the cost of delay insensitivity |
VLSI
2010
Springer
13 years 3 months ago
2010
Springer
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
FLAIRS
2004
13 years 6 months ago
2004
What makes a good consistency ? Depending on the constraint, it may be a good pruning power or a low computational cost. By "weakening" arc-consistency, we propose to de...
CODES
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper proposes a new link for asynchronous NoC communications that is resilient to transient faults on the wires of the link without impact on the data transfer capability. R...
ET
2002
13 years 4 months ago
2002
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
ADHOCNETS
2009
Springer
13 years 7 months ago
2009
Springer
This paper is a sequel of previous work, in which we have studied the traffic management problem in UMTS. The main objective was to improve the spectral efficiency of cellular netw...