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MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 11 months ago
Tradeoffs in designing accelerator architectures for visual computing
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, S...
ISPASS
2007
IEEE
13 years 11 months ago
Modeling and Characterizing Power Variability in Multicore Architectures
Parameter variation due to manufacturing error will be an unavoidable consequence of technology scaling in future generations. The impact of random variation in physical factors s...
Ke Meng, Frank Huebbers, Russ Joseph, Yehea I. Ism...
HPCA
2003
IEEE
14 years 5 months ago
A Statistically Rigorous Approach for Improving Simulation Methodology
Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing a new processor architecture, as well as when evaluating the ...
Joshua J. Yi, David J. Lilja, Douglas M. Hawkins
IEEEPACT
2002
IEEE
13 years 9 months ago
Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power
Energy efficiency in microarchitectures has become a necessity. Significant dynamic energy savings can be realized for adaptive storage structures such as caches, issue queues, ...
Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasu...
ICCD
2004
IEEE
126views Hardware» more  ICCD 2004»
14 years 1 months ago
Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling
Simultaneous Multithreading (SMT) is emerging as an effective microarchitecture model to increase the utilization of resources in modern super-scalar processors. However, co-sched...
Joshua L. Kihm, Daniel A. Connors