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ASPDAC
2005
ACM
97views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Opportunities and challenges for better than worst-case design
The progressive trend of fabrication technologies towards the nanometer regime has created a number of new physical design challenges for computer architects. Design complexity, u...
Todd M. Austin, Valeria Bertacco, David Blaauw, Tr...
ISPD
2005
ACM
130views Hardware» more  ISPD 2005»
13 years 10 months ago
Improved algorithms for link-based non-tree clock networks for skew variability reduction
In the nanometer VLSI technology, the variation effects like manufacturing variation, power supply noise, temperature etc. become very significant. As one of the most vital nets...
Anand Rajaram, David Z. Pan, Jiang Hu
ISPD
2005
ACM
205views Hardware» more  ISPD 2005»
13 years 10 months ago
Coupling aware timing optimization and antenna avoidance in layer assignment
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
Di Wu, Jiang Hu, Rabi N. Mahapatra
CAIP
2005
Springer
13 years 10 months ago
Virtual Garment Pre-positioning
In this paper, we present an easy method for automatic 3D garment pre-positioning. Given a digital 3D mannequin and a set of 2D patterns, the problem consists in sewing automatical...
Tung Le Thanh, André Gagalowicz
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
13 years 10 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose