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INFOCOM
2000
IEEE
13 years 8 months ago
Heuristic Algorithms for Joint Configuration of the Optical and Electrical Layer in Multi-Hop Wavelength Routing Networks
An efficient and general graph-theoretic model (the Wavelength-Graph (WG)) has been proposed which enables solving the static Routing and Wavelength Assignment (RWA) problems in Mu...
Tibor Cinkler, Dániel Marx, Claus Popp Lars...
ICCD
2004
IEEE
101views Hardware» more  ICCD 2004»
14 years 1 months ago
Increasing Processor Performance Through Early Register Release
Modern superscalar microprocessors need sizable register files to support large number of in-flight instructions for exploiting ILP. An alternative to building large register file...
Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kan...
MICRO
2008
IEEE
107views Hardware» more  MICRO 2008»
13 years 11 months ago
A distributed processor state management architecture for large-window processors
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
Isidro Gonzalez, Marco Galluzzi, Alexander V. Veid...
APCSAC
2005
IEEE
13 years 10 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi
ICPP
2000
IEEE
13 years 9 months ago
Simultaneous Multithreading-Based Routers
This work considers the use of a n S M T (simultaneous multithreading) processor in lieu of the conventional processor(s) in a router and evaluates quantitatively the potential ga...
Kemathat Vibhatavanij, Nian-Feng Tzeng, Angkul Kon...