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ITC
1999
IEEE
73views Hardware» more  ITC 1999»
13 years 10 months ago
Fault diagnosis in scan-based BIST using both time and space information
Jayabrata Ghosh-Dastidar, Debaleena Das, Nur A. To...
ITC
1999
IEEE
103views Hardware» more  ITC 1999»
13 years 10 months ago
Resistive bridge fault modeling, simulation and test generation
Resistive bridging faults in combinational CMOS circuits are studied in this work. Circuit-level models are ed to voltage behavior for use in voltage-level fault simulation and te...
Vijay R. Sar-Dessai, D. M. H. Walker
ITC
1999
IEEE
59views Hardware» more  ITC 1999»
13 years 10 months ago
Static component interconnection test technology in practice
Static Component Interconnection Test Technology (SCITT) is a new XNOR circuit based technology that is used for board-level interconnection test. SCITT provides an easy test meth...
Frans De Jong, Rob Raaijmakers
ITC
1999
IEEE
178views Hardware» more  ITC 1999»
13 years 10 months ago
Embedded X86 testing methodology
The embedded core testing methodology at Advanced Micro Devices Inc. involves adopting a disciplined system for developing new products with a focus on time to market and engineer...
Luis Basto, Asif Khan, Pete Hodakievic
ITC
1999
IEEE
67views Hardware» more  ITC 1999»
13 years 10 months ago
Failure analysis of timing and IDDq-only failures from the SEMATECH test methods experiment
SEMATECH has sponsored a "Test Method Evaluation" study to understand the trade-offs among the most common test methodologies used in the industry[1,2]. This paper prese...
Phil Nigh, David P. Vallett, Atul Patel, Jason Wri...