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VTS
2002
IEEE
162views Hardware» more  VTS 2002»
13 years 9 months ago
Self-Testing Second-Order Delta-Sigma Modulators Using Digital Stimulus
Single-bit second-order delta-sigma modulators are commonly used in high-resolution ADCs. Testing this type of modulator requires a high-resolution test stimulus, which is diffic...
Chee-Kian Ong, Kwang-Ting (Tim) Cheng
VTS
2002
IEEE
128views Hardware» more  VTS 2002»
13 years 9 months ago
Power Supply Transient Signal Analysis Under Real Process and Test Hardware Models
A device testing method called Transient Signal Analysis (TSA) is subjected to elements of a real process and testing environment in this paper. Simulations experiments are design...
Abhishek Singh, Jim Plusquellic, Anne E. Gattiker
VTS
2002
IEEE
113views Hardware» more  VTS 2002»
13 years 9 months ago
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
Krishna Sekar, Sujit Dey
VTS
2002
IEEE
121views Hardware» more  VTS 2002»
13 years 9 months ago
Very Low Voltage Testing of SOI Integrated Circuits
Very Low Voltage (VLV) testing has been proposed to increase flaw detection in bulk silicon CMOS integrated circuits and this paper explores these and additional advantages in the...
Eric MacDonald, Nur A. Touba
VTS
2002
IEEE
109views Hardware» more  VTS 2002»
13 years 9 months ago
Controlling Peak Power During Scan Testing
This paper presents a procedure for modifying a given set of scan vectors so that the peak power during scan testing is kept below a specified limit without reducing fault coverag...
Ranganathan Sankaralingam, Nur A. Touba