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FPGA
2000
ACM
98views FPGA» more  FPGA 2000»
13 years 8 months ago
Field programmable port extender (FPX) for distributed routing and queuing
John W. Lockwood, Jonathan S. Turner, David E. Tay...
FPGA
2000
ACM
114views FPGA» more  FPGA 2000»
13 years 8 months ago
Generating highly-routable sparse crossbars for PLDs
A method for evaluating and constructing sparse crossbars which are both area efficient and highly routable is presented. The evaluation method uses a network flow algorithm to ac...
Guy G. Lemieux, Paul Leventis, David M. Lewis
FPGA
2000
ACM
150views FPGA» more  FPGA 2000»
13 years 8 months ago
Programmable memory blocks supporting content-addressable memory
The Embedded System Block (ESB) of the APEX E programmable logic device family from Altera Corporation includes the capability of implementing content addressable memory (CAM) as ...
Frank Heile, Andrew Leaver, Kerry Veenstra
FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
13 years 8 months ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
FPGA
2000
ACM
168views FPGA» more  FPGA 2000»
13 years 8 months ago
A benchmark suite for evaluating configurable computing systems--status, reflections, and future directions
This paper presents a benchmark suite for evaluating a configurable computing system's infrastructure, both tools and architecture. A novel aspect of this work is the use of ...
S. Kumar, Luiz Pires, Subburajan Ponnuswamy, C. Na...
FPGA
2000
ACM
122views FPGA» more  FPGA 2000»
13 years 8 months ago
A reconfigurable multi-function computing cache architecture
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
Huesung Kim, Arun K. Somani, Akhilesh Tyagi
FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
13 years 8 months ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
13 years 8 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
FPGA
2000
ACM
177views FPGA» more  FPGA 2000»
13 years 8 months ago
Automatic generation of FPGA routing architectures from high-level descriptions
In this paper we present a "high-level" FPGA architecture description language which lets FPGA architects succinctly and quickly describe an FPGA routing architecture. W...
Vaughn Betz, Jonathan Rose
FPGA
2000
ACM
114views FPGA» more  FPGA 2000»
13 years 8 months ago
Synthesis for FPGAs with embedded memory blocks
Jason Cong, Kenneth Yan