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    FPGA
    2008
    ACM
    203views FPGA» more  FPGA 2008»
    Area and delay trade-offs in the circuit and architecture design of FPGAs
    13 years 6 months ago
    Area and delay trade-offs in the circuit and architecture design of FPGAs
    Download  www.ece.wisc.edu
    Ian Kuon, Jonathan Rose
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    FPGA
    2008
    ACM
    174views FPGA» more  FPGA 2008»
    Pattern-based behavior synthesis for FPGA resource reduction
    13 years 6 months ago
    Pattern-based behavior synthesis for FPGA resource reduction
    Download  cadlab.cs.ucla.edu
    Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
    Jason Cong, Wei Jiang
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    FPGA
    2008
    ACM
    174views FPGA» more  FPGA 2008»
    When FPGAs are better at floating-point than microprocessors
    13 years 6 months ago
    When FPGAs are better at floating-point than microprocessors
    Download  prunel.ccsd.cnrs.fr
    It has been shown that FPGAs could outperform high-end microprocessors on floating-point computations thanks to massive parallelism. However, most previous studies re-implement in...
    Florent de Dinechin, Jérémie Detrey,...
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    FPGA
    2008
    ACM
    170views FPGA» more  FPGA 2008»
    Architecture-specific packing for virtex-5 FPGAs
    13 years 6 months ago
    Architecture-specific packing for virtex-5 FPGAs
    Download  www.eecg.utoronto.ca
    We consider packing in the commercial FPGA context and examine the speed, performance and power trade-offs associated with packing in a state-of-the art FPGA
    Taneem Ahmed, Paul D. Kundarewich, Jason Helge And...
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    FPGA
    2008
    ACM
    623views FPGA» more  FPGA 2008»
    From the bitstream to the netlist
    13 years 6 months ago
    From the bitstream to the netlist
    Download  www.ulogic.org
    We present an in-depth analysis of the Xilinx bitstream format. The information gathered in this paper allows bitstream compilation and decompilation. While not actually compromis...
    Jean-Baptiste Note, Éric Rannaud
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    FPGA
    2008
    ACM
    136views FPGA» more  FPGA 2008»
    HybridOS: runtime support for reconfigurable accelerators
    13 years 6 months ago
    HybridOS: runtime support for reconfigurable accelerators
    Download  users.crhc.illinois.edu
    We present HybridOS, a set of operating system extensions for supporting fine-grained reconfigurable accelerators integrated with general-purpose computing platforms. HybridOS spe...
    John H. Kelm, Steven S. Lumetta
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    FPGA
    2008
    ACM
    129views FPGA» more  FPGA 2008»
    Efficient ASIP design for configurable processors with fine-grained resource sharing
    13 years 6 months ago
    Efficient ASIP design for configurable processors with fine-grained resource sharing
    Download  www.icims.csl.uiuc.edu
    Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
    Quang Dinh, Deming Chen, Martin D. F. Wong
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    FPGA
    2008
    ACM
    161views FPGA» more  FPGA 2008»
    Implementing high-speed string matching hardware for network intrusion detection systems
    13 years 6 months ago
    Implementing high-speed string matching hardware for network intrusion detection systems
    Download  cial.csie.ncku.edu.tw
    This paper presents high-throughput techniques for implementing FSM based string matching hardware on FPGAs. By taking advantage of the fact that string matching operations for di...
    Atul Mahajan, Benfano Soewito, Sai K. Parsi, Ning ...
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    FPGA
    2008
    ACM
    155views FPGA» more  FPGA 2008»
    A novel FPGA logic block for improved arithmetic performance
    13 years 6 months ago
    A novel FPGA logic block for improved arithmetic performance
    Download  lap.epfl.ch
    To improve FPGA performance for arithmetic circuits, this paper proposes a new architecture for FPGA logic cells that includes a 6:2 compressor. The new cell features additional f...
    Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
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    FPGA
    2008
    ACM
    151views FPGA» more  FPGA 2008»
    Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs
    13 years 6 months ago
    Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs
    Download  www3.ee.iastate.edu
    Look-up table based FPGAs have migrated from a niche technology for design prototyping to a valuable end-product component and, in some cases, a replacement for general purpose pr...
    Michael T. Frederick, Arun K. Somani
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