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TCAD
2010
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12 years 11 months ago
Fault Tolerant Network on Chip Switching With Graceful Performance Degradation
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
Adán Kohler, Gert Schley, Martin Radetzki
SC
1993
ACM
13 years 8 months ago
Optimal fully adaptive wormhole routing for meshes
A deadlock-free fully adaptive routing algorithm for 2D meshes which is optimal in the number of virtual channels required and in the number of restrictions placed on the use of t...
Loren Schwiebert, D. N. Jayasimha
IPPS
2006
IEEE
13 years 10 months ago
Analytical performance modelling of partially adaptive routing in wormhole hypercubes
Although several analytical models have been proposed in the literature for different interconnection networks with different routing algorithms, there is only one work dealing wi...
Ahmad Patooghy, Hamid Sarbazi-Azad
ITNG
2007
IEEE
13 years 10 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
WWW
2004
ACM
14 years 5 months ago
Small world peer networks in distributed web search
In ongoing research, a collaborative peer network application is being proposed to address the scalability limitations of centralized search engines. Here we introduce a local ada...
Ruj Akavipat, Le-Shin Wu, Filippo Menczer