ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Abstract-- We are proposing "PPRAM-Link": a new highspeed communication standard for merged-DRAM/logic SoC architecture. PPRAM-Link standard is composed of physical/logic...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Abstract-- In the paper, we present a real-time speech recognition chip for monosyllables such as A, B, ..., etc. The chip recognizes up to 64 monosyllables based on the Hidden Mar...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Abstract-- We propose a method of correlating circuit performance with technology fluctuations during the circuit-design phase. The method employs test circuits sensitive for techn...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...