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    ASPDAC
    2008
    ACM
    82views Hardware» more  ASPDAC 2008»
    Software-cooperative power-efficient heterogeneous multi-core for media processing
    13 years 6 months ago
    Software-cooperative power-efficient heterogeneous multi-core for media processing
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    Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshi...
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    ASPDAC
    2008
    ACM
    77views Hardware» more  ASPDAC 2008»
    Parallel fault backtracing for calculation of fault coverage
    13 years 6 months ago
    Parallel fault backtracing for calculation of fault coverage
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    Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jut...
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    ASPDAC
    2008
    ACM
    99views Hardware» more  ASPDAC 2008»
    A delay model for interconnect trees based on ABCD matrix
    13 years 6 months ago
    A delay model for interconnect trees based on ABCD matrix
    Download  www.cecs.uci.edu
    - The accuracy of interconnect delay estimations can be improved by the method presented in this paper in which the first two moments are obtained with ABCD matrix and a stable mod...
    Guofei Zhou, Li Su, Depeng Jin, Lieguang Zeng
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    ASPDAC
    2008
    ACM
    73views Hardware» more  ASPDAC 2008»
    Webpage-based benchmarks for mobile device design
    13 years 6 months ago
    Webpage-based benchmarks for mobile device design
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    Marc Somers, JoAnn M. Paul
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    ASPDAC
    2008
    ACM
    137views Hardware» more  ASPDAC 2008»
    Automatic interface synthesis based on the classification of interface protocols of IPs
    13 years 6 months ago
    Automatic interface synthesis based on the classification of interface protocols of IPs
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    ChangRyul Yun, DongSoo Kang, YoungHwan Bae, Hanhn ...
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    ASPDAC
    2008
    ACM
    135views Hardware» more  ASPDAC 2008»
    Temperature-aware MPSoC scheduling for reducing hot spots and gradients
    13 years 6 months ago
    Temperature-aware MPSoC scheduling for reducing hot spots and gradients
    Download  students.cs.tamu.edu
    Thermal hot spots and temperature gradients on the die need to be minimized to manufacture reliable systems while meeting energy and performance constraints. In this work, we solve...
    Ayse Kivilcim Coskun, Tajana Simunic Rosing, Keith...
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    ASPDAC
    2008
    ACM
    95views Hardware» more  ASPDAC 2008»
    MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks
    13 years 6 months ago
    MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks
    Download  www.cerc.utexas.edu
    A leaf-level clock mesh is known to be very tolerant to variations [1]. However, its use is limited to a few high-end designs because of the high power/resource requirements and la...
    Anand Rajaram, David Z. Pan
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    ASPDAC
    2008
    ACM
    115views Hardware» more  ASPDAC 2008»
    An optimal algorithm for sizing sequential circuits for industrial library based designs
    13 years 6 months ago
    An optimal algorithm for sizing sequential circuits for industrial library based designs
    Download  vlsi.ece.wisc.edu
    In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
    Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Che...
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    ASPDAC
    2008
    ACM
    65views Hardware» more  ASPDAC 2008»
    Statistical noise margin estimation for sub-threshold combinational circuits
    13 years 6 months ago
    Statistical noise margin estimation for sub-threshold combinational circuits
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    Yu Pu, Jose de Jesus Pineda de Gyvez, Henk Corpora...
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    ASPDAC
    2008
    ACM
    80views Hardware» more  ASPDAC 2008»
    An innovative Steiner tree based approach for polygon partitioning
    13 years 6 months ago
    An innovative Steiner tree based approach for polygon partitioning
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    Yongqiang Lu, Qing Su, Jamil Kawa
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