ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
A two-stage optimization methodology is proposed to solve the fixed-outline floorplanning problem that is a global optimization problem for wirelength minimization. In the first st...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
Abstract-- In this paper we present the first bus-aware microarchitectural floorplanning. Our goal is to study the impact of bus routability on other important floorplanning object...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
In this paper, we study the buffered clock tree synthesis problem under thermal variations for 3D IC technology. Our major contribution is the Balanced Skew Theorem, which provides...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
This paper investigates methods for minimizing the impact of process variation on clock skew using buffer and wire sizing. While most papers on clock trees ignore data-path circuit...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
: Thermal issue is a critical challenge in 3D IC circuit design. Incorporating thermal vias into 3D IC is a promising way to mitigate thermal issues by lowering down the thermal re...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
Phase shifting mask (PSM) is a promising resolution enhancement technique, which is used in the deep sub-wavelength lithography of the VLSI fabrication process. However, applying ...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM