CODES
2009
IEEE
13 years 9 months ago
2009
IEEE
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
IPPS
2003
IEEE
13 years 10 months ago
2003
IEEE
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
ASPLOS
2004
ACM
13 years 10 months ago
2004
ACM
This paper explores a new technique called coherence decoupling, which breaks a traditional cache coherence protocol into two protocols: a Speculative Cache Lookup (SCL) protocol ...
MICRO
2006
IEEE
13 years 10 months ago
2006
IEEE
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
DSN
2008
IEEE
13 years 11 months ago
2008
IEEE
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...