Sciweavers

DAC
1994
ACM
13 years 8 months ago
ASTRX/OBLX: Tools for Rapid Synthesis of High-Performance Analog Circuits
We describe ASTRX/OBLX, a synthesis system that can size high-performance analog circuit topologies to meet usersupplied linear performance specifications without designer-supplied...
Emil S. Ochotta, Rob A. Rutenbar, L. Richard Carle...
DAC
1994
ACM
13 years 8 months ago
Performance-Driven Simultaneous Place and Route for Row-Based FPGAs
Sequential place and route tools for FPGAs are inherently weak at addressing both wirability and timing optimizations. This is primarily due to the difficulty in predicting these ...
Sudip Nag, Rob A. Rutenbar
DAC
1994
ACM
13 years 8 months ago
Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits
A stochastic global optimization approach is presented for transistor sizing in CMOS VLSI circuits. This is a direct search strategy for the best design among feasible ones, with ...
Sharad Mehrotra, Paul D. Franzon, Wentai Liu
DAC
1994
ACM
13 years 8 months ago
Fitting Formal Methods into the Design Cycle
This tutorial introduces several methods of formal hardware veri cation that could potentially have a practical impact on the design process. The measure of success in integrating...
Kenneth L. McMillan
DAC
1994
ACM
13 years 8 months ago
Cost of Silicon Viewed from VLSI Design Perspective
- This paper provides an overview of design/test/CAD silicon cost-related issues. All major factors contributing to the rapid growth of manufacturing costs are explained and a simp...
Wojciech Maly
DAC
1994
ACM
13 years 8 months ago
Data Flow Partitioning for Clock Period and Latency Minimization
Lung-Tien Liu, Minshine Shih, Chung-Kuan Cheng
DAC
1994
ACM
13 years 8 months ago
A Unified Approach to Multilayer Over-the-Cell Routing
Sreekrishna Madhwapathy, Naveed A. Sherwani, Siddh...
DAC
1994
ACM
13 years 8 months ago
Exact Minimum Cycle Times for Finite State Machines
In current research, the minimum cycle times of finite state machines are estimated by computing the delays of the combinational logic in the finite state machines. Even though th...
William K. C. Lam, Robert K. Brayton, Alberto L. S...