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DATE
1997
IEEE
75views Hardware» more  DATE 1997»
13 years 8 months ago
Using constraint logic programming in memory synthesis for general purpose computers
In modern computer systems the performance is dominated by the memory performance. Currently, there is neither a systematic design methodology nor a tool for the design of memory ...
Renate Beckmann, Jürgen Herrmann
DATE
1997
IEEE
92views Hardware» more  DATE 1997»
13 years 8 months ago
MOSAIC: a multiple-strategy oriented sequential ATPG for integrated circuits
The paper proposes a novel approach in an attempt to solve the test problem for sequential circuits. Up until now, most of the classical test pattern techniques use a number of al...
A. Dargelas, C. Gauthron, Yves Bertrand
DATE
1997
IEEE
85views Hardware» more  DATE 1997»
13 years 8 months ago
Adaptive least mean square behavioral power modeling
Alessandro Bogliolo, Luca Benini, Giovanni De Mich...
DATE
1997
IEEE
62views Hardware» more  DATE 1997»
13 years 8 months ago
Efficient utilization of scratch-pad memory in embedded processor applications
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
DATE
1997
IEEE
86views Hardware» more  DATE 1997»
13 years 8 months ago
Highly scalable parallel parametrizable architecture of the motion estimator
In this paper a parametrizable architecture of a motion estimator (ME) is presented. The ME is designed as a generic full pixel calculation module which can be adopted for di eren...
Radim Cmar, Serge Vernalde
DATE
1997
IEEE
58views Hardware» more  DATE 1997»
13 years 8 months ago
Generation of the HDL-A-model of a micromembrane from its finite-element-description
Klaus Hofmann, Manfred Glesner, Nicu Sebe, A. Mano...
DATE
1997
IEEE
76views Hardware» more  DATE 1997»
13 years 8 months ago
New static compaction techniques of test sequences for sequential circuits
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
DATE
1997
IEEE
89views Hardware» more  DATE 1997»
13 years 8 months ago
Cone-based clustering heuristic for list-scheduling algorithms
List scheduling algorithms attempt to minimize latency under resource constraints using a priority list. We propose a new heuristic that can be used in conjunction with any priori...
Sriram Govindarajan, Ranga Vemuri
DATE
1997
IEEE
115views Hardware» more  DATE 1997»
13 years 8 months ago
Analogue layout generation by World Wide Web server-based agents
A World Wide Web (WWW) based client/server system has been developed which allows server-side process independent layout generators to generate the design rule correct geometry of...
Les T. Walczowski, D. Nalbantis, W. A. J. Waller, ...