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DATE
1999
IEEE
73views Hardware» more  DATE 1999»
9 years 4 months ago
Design For Testability Method for CML Digital Circuits
This paper presents a new Design for Testability (DFT) technique for Current-Mode Logic (CML) circuits. This new technique, with little overhead, using built-in detectors, monitor...
Bernard Antaki, Yvon Savaria, Nanhan Xiong, Saman ...
DATE
1999
IEEE
95views Hardware» more  DATE 1999»
9 years 4 months ago
Object-Oriented Reuse Methodology for VHDL
In the reuse domain, the necessity of finding a new, more suitable description language opposes the need to make reuse an accepted practice, and thus related to standards. This pa...
Cristina Barna, Wolfgang Rosenstiel
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
9 years 4 months ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav
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