DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract—On a commercial digital still camera (DSC) controller chip we practice a novel SOC test integration platform, solving real problems in test scheduling, test IO reduction...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Most of the DNA chips available on the market are based on external or internal optical detection (fluorescence or chemiluminescence) and need a bulky chip reader (optics, laser, ...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper gives an overview of a new technique, named pseudo-ring testing (PRT). PRT can be applied for testing wide type of random access memories (RAM): bitor word-oriented and...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Ultra-wideband (UWB) communication is an emerging wireless technology that promises high data rates over short distances and precise locationing. The large available bandwidth and...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...