Sciweavers

DATE
2006
IEEE
74views Hardware» more  DATE 2006»
13 years 10 months ago
Hardware efficient architectures for Eigenvalue computation
Yang Liu, Christos-Savvas Bouganis, Peter Y. K. Ch...
DATE
2006
IEEE
140views Hardware» more  DATE 2006»
13 years 10 months ago
Optimization of regular expression pattern matching circuits on FPGA
Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to ...
Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang,...
DATE
2006
IEEE
101views Hardware» more  DATE 2006»
13 years 10 months ago
Cooptimization of interface hardware and software for I/O controllers
The allocation of device variables on I/O registers affects the code size and performance of an I/O device driver. This work seeks the allocation with the minimal software or hard...
Kuan Jen Lin, Shih Hao Huang, Shan Chien Fang
DATE
2006
IEEE
99views Hardware» more  DATE 2006»
13 years 10 months ago
Multiple-fault diagnosis based on single-fault activation and single-output observation
In this paper, we propose a new circuit transformation technique in conjunction with the use of a special diagnostic test pattern, named SO-SLAT pattern, to achieve higher multipl...
Yung-Chieh Lin, Kwang-Ting Cheng
DATE
2006
IEEE
76views Hardware» more  DATE 2006»
13 years 10 months ago
Performance optimization for energy-aware adaptive checkpointing in embedded real-time systems
Using additional store-checkpoinsts (SCPs) and compare-checkpoints (CCPs), we present an adaptive checkpointing for double modular redundancy (DMR) in this paper. The proposed app...
Zhongwen Li, Hong Chen, Shui Yu
DATE
2006
IEEE
116views Hardware» more  DATE 2006»
13 years 10 months ago
SoC: fuelling the hopes of the mobile industry
Uwe Lambrette, Booz Allen Hamilton
DATE
2006
IEEE
125views Hardware» more  DATE 2006»
13 years 10 months ago
Combining simulation and formal methods for system-level performance analysis
Recent research on performance analysis for embedded systems shows a trend to formal compositional models and methods. These compositional methods can be used to determine the per...
Simon Künzli, Francesco Poletti, Luca Benini,...
DATE
2006
IEEE
72views Hardware» more  DATE 2006»
13 years 10 months ago
A design for failure analysis (DFFA) technique to ensure incorruptible signatures
Fast failure analysis is a key enabler in shortening the
Sandip Kundu
DATE
2006
IEEE
94views Hardware» more  DATE 2006»
13 years 10 months ago
An analytical state dependent leakage power model for FPGAs
In this paper we present a state dependent analytical leakage power model for FPGAs. The model accounts for subthreshold leakage and gate leakage in FPGAs, since these are the two...
Akhilesh Kumar, Mohab Anis
DATE
2006
IEEE
106views Hardware» more  DATE 2006»
13 years 10 months ago
Memory centric thread synchronization on platform FPGAs
Concurrent programs are difficult to write, reason about, re-use, and maintain. In particular, for system-level ions that use a shared memory abstraction for thread or process syn...
Chidamber Kulkarni, Gordon J. Brebner