Sciweavers

DATE
2006
IEEE
118views Hardware» more  DATE 2006»
13 years 11 months ago
Design and implementation of a modular and portable IEEE 754 compliant floating-point unit
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-poin...
Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Hei...
DATE
2006
IEEE
117views Hardware» more  DATE 2006»
13 years 11 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
13 years 11 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
DATE
2006
IEEE
117views Hardware» more  DATE 2006»
13 years 11 months ago
Activity clustering for leakage management in SPMs
This paper we proposes compiler-based leakage optimization strategy for on-chip scratch-pad memories (SPMs). The idea is to keep only a small set of SPM regions active at a given ...
Mahmut T. Kandemir, Guangyu Chen, Feihui Li, Mary ...
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
13 years 11 months ago
Lens aberration aware timing-driven placement
Process variations due to lens aberrations are to a large extent systematic, and can be modeled for purposes of analyses and optimizations in the design phase. Traditionally, vari...
Andrew B. Kahng, Chul-Hong Park, Puneet Sharma, Qi...
DATE
2006
IEEE
118views Hardware» more  DATE 2006»
13 years 11 months ago
New methods and coverage metrics for functional verification
Vasco Jerinic, Jan Langer, Ulrich Heinkel, Dietmar...
DATE
2006
IEEE
124views Hardware» more  DATE 2006»
13 years 11 months ago
Timing-driven cell layout de-compaction for yield optimization by critical area minimization
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
DATE
2006
IEEE
77views Hardware» more  DATE 2006»
13 years 11 months ago
Soft-error classification and impact analysis on real-time operating systems
This paper investigates the sensitivity of real-time systems running applications under operating systems that are subject to soft-errors. We consider applications using different...
N. Ignat, B. Nicolescu, Yvon Savaria, Gabriela Nic...
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
13 years 11 months ago
ASIP architecture for multi-standard wireless terminals
This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...
Daniele Lo Iacono, J. Zory, Ettore Messina, N. Pia...