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FPL
2005
Springer
79views Hardware» more  FPL 2005»
13 years 11 months ago
PGR: A Software Package for Reconfigurable Super-Computing
Tsuyoshi Hamada, Naohito Nakasato
FPL
2005
Springer
73views Hardware» more  FPL 2005»
13 years 11 months ago
Defect Tolerance in Multiple-FPGA Systems
SRAM-based FPGAs have an inherent capacity for defect tolerance. We propose a simple scheme that exploits this potential in multiple-FPGA systems. The symmetry of the system is ex...
Zohair Hyder, John Wawrzynek
FPL
2005
Springer
144views Hardware» more  FPL 2005»
13 years 11 months ago
Accelerating Molecular Dynamics Simulations With Configurable Circuits
Molecular Dynamics (MD) is of central importance to computational chemistry. Here we show that MD can be implemented efficiently on a COTS FPGA board, and that speedups from ¿½...
Yongfeng Gu, Tom Van Court, Martin C. Herbordt
FPL
2005
Springer
89views Hardware» more  FPL 2005»
13 years 11 months ago
Automatic Creation of Domain-Specific Reconfigurable CPLDs for SoC
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck
FPL
2005
Springer
86views Hardware» more  FPL 2005»
13 years 11 months ago
On the Reliability Evaluation of SRAM-Based FPGA Designs
Benefits of Field Programmable Gate Arrays (FPGAs) have lead to a spectrum of use ranging from consumer products to astronautics. This diversity necessitates the need to evaluate ...
Olivier Héron, Talal Arnaout, Hans-Joachim ...
FPL
2005
Springer
96views Hardware» more  FPL 2005»
13 years 11 months ago
Dynamic Reconfiguration with hardwired Networks-on-Chip on future FPGAs
Due to their layered approach, Networks-on-Chip (NoC) are a promising communication backbone in the field of heterogeneous dynamically reconfigurable systems. In this paper a fu...
Ronald Hecht, Stephan Kubisch, Andreas Herrholtz, ...
FPL
2005
Springer
89views Hardware» more  FPL 2005»
13 years 11 months ago
Snow 2.0 IP Core for Trusted Hardware
Stream ciphers are a promising technique for encryption in trusted hardware. ISO/IEC standardization is currently under way and SNOW 2.0 is one of the remaining candidates. Its sof...
Wenhai Fang, Thomas Johansson, Lambert Spaanenburg
FPL
2005
Springer
122views Hardware» more  FPL 2005»
13 years 11 months ago
FPGA-Aware Garbage Collection in Java
— During codesign of a system, one still runs into the impedance mismatch between the software and hardware worlds. er identifies the different levels of abstraction of hardware...
Philippe Faes, Mark Christiaens, Dries Buytaert, D...
FPL
2005
Springer
110views Hardware» more  FPL 2005»
13 years 11 months ago
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...
Robert G. Dimond, Oskar Mencer, Wayne Luk
FPL
2005
Springer
119views Hardware» more  FPL 2005»
13 years 11 months ago
Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes
This paper presents a revised model for the yield analysis of FPGA interconnect layers. Based on proven yield models, this work improves the predictions and assumptions of previous...
Nicola Campregher, Peter Y. K. Cheung, George A. C...