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FPL
2009
Springer
103views Hardware» more  FPL 2009»
11 years 3 months ago
Customizable domain-specific computing
In this article, we introduce the ongoing research in modeling and mapping for heterogeneous, customizable, parallel systems, as part of the effort in the newly established Center...
Jason Cong
FPL
2009
Springer
106views Hardware» more  FPL 2009»
11 years 8 months ago
An ASIC perspective on FPGA optimizations
In this paper we discuss how various design components perform in both FPGAs and standard cell based ASICs. We also investigate how various common FPGA optimizations will effect t...
Andreas Ehliar, Dake Liu
FPL
2009
Springer
132views Hardware» more  FPL 2009»
11 years 8 months ago
A biophysically accurate floating point somatic neuroprocessor
Yiwei Zhang, José L. Núñez-Y&...
FPL
2009
Springer
162views Hardware» more  FPL 2009»
11 years 8 months ago
Efficient particle-pair filtering for acceleration of molecular dynamics simulation
The acceleration of molecular dynamics (MD) simulations using high performance reconfigurable computing (HPRC) has been much studied. Given the intense competition from multicore...
Matt Chiu, Martin C. Herbordt
FPL
2009
Springer
132views Hardware» more  FPL 2009»
11 years 9 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem
FPL
2009
Springer
100views Hardware» more  FPL 2009»
11 years 9 months ago
A virus scanning engine using a parallel finite-input memory machine and MPUs
This paper presents a virus scanning engine. After showing the difference between ClamAV (an anti-virus software) and SNORT (an intrusion detection software), we show a new archit...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura,...
FPL
2009
Springer
179views Hardware» more  FPL 2009»
11 years 9 months ago
Building heterogeneous reconfigurable systems using threads
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...
Jason Agron, David L. Andrews
FPL
2009
Springer
142views Hardware» more  FPL 2009»
11 years 9 months ago
Cooperative multithreading in dynamically reconfigurable systems
Preemptive multitasking, a popular technique for timesharing of computational resources in software-based systems, faces considerable difficulties when applied to partially reconf...
Enno Lübbers, Marco Platzner
FPL
2009
Springer
105views Hardware» more  FPL 2009»
11 years 9 months ago
Run-time resource management in fault-tolerant network on reconfigurable chips
This paper investigates the challenges of run-time resource management in future coarse-grained network-onreconfigurable-chips (NoRCs). Run-time reconfiguration is a key feature e...
Mohammad Hosseinabady, José L. Nú&nt...
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