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TCAD
2011
8 years 6 months ago
GRIP: Global Routing via Integer Programming
Abstract—This work introduces GRIP, a global routing technique via integer programming. GRIP optimizes wirelength and via cost directly without going through a traditional layer ...
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
ISLPED
2010
ACM
183views Hardware» more  ISLPED 2010»
8 years 11 months ago
A pareto-algebraic framework for signal power optimization in global routing
This paper proposes a framework for (signal) interconnect power optimization at the global routing stage. In a typical design flow, the primary objective of global routing is mini...
Hamid Shojaei, Tai-Hsuan Wu, Azadeh Davoodi, Twan ...
EURODAC
1995
IEEE
127views VHDL» more  EURODAC 1995»
9 years 2 months ago
Layout synthesis for datapath designs
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
Naveen Buddi, Malgorzata Chrzanowska-Jeske, Charle...
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
9 years 3 months ago
BioRoute: a network-flow based routing algorithm for digital microfluidic biochips
Due to the recent advances in microfluidics, digital microfluidic biochips are expected to revolutionize laboratory procedures. One critical problem for biochip synthesis is the dr...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
DAC
2010
ACM
9 years 3 months ago
A parallel integer programming approach to global routing
We propose a parallel global routing algorithm that concurrently processes routing subproblems corresponding to rectangular subregions covering the chip area. The algorithm uses a...
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
ASPDAC
2009
ACM
184views Hardware» more  ASPDAC 2009»
9 years 3 months ago
FastRoute 4.0: global router with efficient via minimization
The number of vias generated during the global routing stage is a critical factor for the yield of final circuits. However, most global routers only approach the problem by chargin...
Yue Xu, Yanheng Zhang, Chris Chu
DAC
1998
ACM
9 years 3 months ago
Global Routing with Crosstalk Constraints
—Due to the scaling down of device geometry and increasing of frequency in deep submicron designs, crosstalk between interconnection wires has become an important issue in very l...
Hai Zhou, D. F. Wong
ICCAD
2000
IEEE
91views Hardware» more  ICCAD 2000»
9 years 3 months ago
A Timing-Constrained Algorithm for Simultaneous Global Routing of Multiple Nets
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
Jiang Hu, Sachin S. Sapatnekar
GLVLSI
2000
IEEE
113views VLSI» more  GLVLSI 2000»
9 years 3 months ago
A novel technique for sea of gates global routing
We present a novel global routing and cross-point assignment methodology for sea-of-gates (SOG) designs. Using the proposed congestion driven spanning trees (CDST), and continuous...
Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal
ASPDAC
2004
ACM
149views Hardware» more  ASPDAC 2004»
9 years 4 months ago
A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design
With the exponential reduction in the scaling of feature size, inter-wire coupling capacitance becomes the dominant part of load capacitance. Two problems are introduced by coupli...
Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, J...
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