This paper describes the synthesis and hardware implementation of a signal-type asynchronous data communication mechanism (ACM). Such an ACM can be used in systems where a data-dr...
In this paper, we propose a new block cipher HIGHT with 64-bit block length and 128-bit key length. It provides low-resource hardware implementation, which is proper to ubiquitous ...
In this paper, we propose a method to design a neural network(NN) by using a genetic algorithm(GA) and simulated annealing(SA). And also, in order to demonstrate the effectivenes...
Abstract. Visual data
ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally specied by signal
ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...
In many applications a software implementation of ECC (Elliptic Curve Cryptography) might be inappropriate due to performance requirements, therefore hardware implementations are ...
After a reminder about embryonic machines endowed with universal construction and universal computation properties, this paper presents a novel architecture providing additional s...
In this paper we will introduce a novel approach for the on-chip generation of a faulttolerant clock. We will motivate why it becomes more and more desirable to provide VLSI circu...
Markus Ferringer, Gottfried Fuchs, Andreas Steinin...
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...
Hossam A. H. Fahmy, Ramy Raafat, Amira M. Abdel-Ma...
The JPEG-LS algorithm is one of the recently designated standards for lossless compression of grayscale and color images. In this paper, simulation results for lossless and near l...