Sciweavers

ASYNC
2001
IEEE
164views Hardware» more  ASYNC 2001»
13 years 8 months ago
Synthesis and Implementation of a Signal-Type Asynchronous Data Communication Mechanism
This paper describes the synthesis and hardware implementation of a signal-type asynchronous data communication mechanism (ACM). Such an ACM can be used in systems where a data-dr...
Alexandre Yakovlev, Fei Xia, Delong Shang
CHES
2006
Springer
156views Cryptology» more  CHES 2006»
13 years 8 months ago
HIGHT: A New Block Cipher Suitable for Low-Resource Device
In this paper, we propose a new block cipher HIGHT with 64-bit block length and 128-bit key length. It provides low-resource hardware implementation, which is proper to ubiquitous ...
Deukjo Hong, Jaechul Sung, Seokhie Hong, Jongin Li...
IJCNN
2000
IEEE
13 years 9 months ago
Design and Evaluation of Neural Networks for Coin Recognition by Using GA and SA
In this paper, we propose a method to design a neural network(NN) by using a genetic algorithm(GA) and simulated annealing(SA). And also, in order to demonstrate the effectivenes...
Yasue Mitsukura, Minoru Fukumi, Norio Akamatsu
FPL
2001
Springer
96views Hardware» more  FPL 2001»
13 years 9 months ago
System Level Tools for DSP in FPGAs
Abstract. Visual data ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally speci ed by signal ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...
ITCC
2005
IEEE
13 years 10 months ago
A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor
In many applications a software implementation of ECC (Elliptic Curve Cryptography) might be inappropriate due to performance requirements, therefore hardware implementations are ...
Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luc...
EH
2005
IEEE
123views Hardware» more  EH 2005»
13 years 10 months ago
Embryonic Machines That Grow, Self-Replicate and Self-Repair
After a reminder about embryonic machines endowed with universal construction and universal computation properties, this paper presents a novel architecture providing additional s...
André Stauffer, Daniel Mange, Gianluca Temp...
DFT
2006
IEEE
82views VLSI» more  DFT 2006»
13 years 11 months ago
VLSI Implementation of a Fault-Tolerant Distributed Clock Generation
In this paper we will introduce a novel approach for the on-chip generation of a faulttolerant clock. We will motivate why it becomes more and more desirable to provide VLSI circu...
Markus Ferringer, Gottfried Fuchs, Andreas Steinin...
ARITH
2009
IEEE
13 years 12 months ago
Energy and Delay Improvement via Decimal Floating Point Units
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...
Hossam A. H. Fahmy, Ramy Raafat, Amira M. Abdel-Ma...
ICIP
2002
IEEE
14 years 6 months ago
Benchmarking and hardware implementation of JPEG-LS
The JPEG-LS algorithm is one of the recently designated standards for lossless compression of grayscale and color images. In this paper, simulation results for lossless and near l...
Andreas E. Savakis, Michael D. Piorun